Page tables provide the mapping between virtual memory and physical memory for each process. This means it needs to be as efficient and as fast as possible. I explore the inner workings of page tables in this episode.
⁃ ⁃ 8:00 MMU
⁃ ⁃ ⁃ ⁃ ⁃ ⁃ ⁃ 11:30 Single Table Byte Addressability
⁃ ⁃ ⁃ ⁃ ⁃ ⁃ ⁃ ⁃ 16:00 Single Table Page addressability
⁃ ⁃ ⁃ ⁃ ⁃ 19:00 Multi-level Paging (Radix tree)
⁃ ⁃ 31:00 Huge Tables
⁃ ⁃ 33:00 TLB
⁃ ⁃ Summary
